[Libre-soc-bugs] [Bug 70] evaluate Bus Architectures

bugzilla-daemon at libre-soc.org bugzilla-daemon at libre-soc.org
Tue Jul 28 21:28:51 BST 2020


Cole Poirier <colepoirier at gmail.com> changed:

           What    |Removed                     |Added
                 CC|                            |colepoirier at gmail.com

--- Comment #17 from Cole Poirier <colepoirier at gmail.com> ---
(In reply to Luke Kenneth Casson Leighton from comment #16)
> https://github.com/SpinalHDL/SaxonSoc
> Banana Bus - appears to be extremely well-designed and suitable
> for out-of-order processors.

Will we translate this line by line into nmigen as we are doing with microwatt?
Is this for Oct 2020 or 2021 or 2022?

You are receiving this mail because:
You are on the CC list for the bug.

More information about the libre-soc-bugs mailing list