[Libre-soc-bugs] [Bug 325] create POWER9 TRAP pipeline

bugzilla-daemon at libre-soc.org bugzilla-daemon at libre-soc.org
Wed Jul 22 17:26:21 BST 2020


--- Comment #114 from Samuel A. Falvo II <kc5tja at arrl.net> ---
(In reply to Luke Kenneth Casson Leighton from comment #111)
> this is why we set up the Decode Fields - and use them.  self.fields.FormNNNN

But, do we have anything similar for registers?  There's a metric ton of
decoders for instruction formats, which I get; but I'm talking also about
arbitrary fields of *registers*.

Per your own advice, I was to translate the pseudocode found in the specs into
formal properties.  The pseudocode itself refers to raw bit fields of registers
by number.  If that is an error, then maybe I should invest some time writing
translation/mapping functions for IBM_regs to EveryoneElse_Regs, assuming these
don't already exist somewhere.

But, looking throughout the code (not just trap, but everywhere), I routinely
see bit-fields referenced using direct mathematical mapping (63-x).

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