[Libre-soc-bugs] [Bug 393] Hook up augmented-Wishbone Memory Bus to LDSTCompUnit (via PortInterface)

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=393

--- Comment #25 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
error handling (exceptions) still TODO here

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