[Libre-soc-bugs] [Bug 238] POWER Compressed Formal Standard writeup

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=238

--- Comment #147 from Alexandre Oliva <oliva at gnu.org> ---
in the pseudo code of phase 1, since we're talking about two separate insns, it
would be desirable to make it explicit whether the Ms, Ns, and extc_id that
appear there are taken from previ or from nexti.

I'm also missing code to handle previ.mode == v3.0B_then_16bit.  it's
particularly important to specify how the conflict is resolved when nexti is a
10-bit insn: does the return-to-16-bit direction prevail over the M bit in
nexti, or vice-versa, or is that conflict to be rejected?

-- 
You are receiving this mail because:
You are on the CC list for the bug.