[Libre-soc-bugs] [Bug 450] Create MMU from microwatt mmu.vhdl

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=450

--- Comment #34 from Cole Poirier <colepoirier at gmail.com> ---
(In reply to Luke Kenneth Casson Leighton from comment #33)
> (In reply to Cole Poirier from comment #32)
> with unsigned, "> 0" is equivalent to != 0.

Ok, my question remains, how to I specify a signal that *must* be != 0?

> > As in no variable assignment to tlb_data?
> 
> correct.

Cool.

> > Then why bother putting that line
> > in the vhdl at all?
> 
> convenience for vhdl.  we are not doing vhdl.

Thank goodness for that.

> > This conflicts with your above statement. So assign tlb_data the value of 0?
> > Why is it not then written as 'tlb_data := '0'
> 
> because it specifies all "other" bits not specified in the assignment
> between the brackets.

Hmm, interesting.

> > Sounds good. What does the suffix _tb stand for by the way?
> 
> standard convention for files that include a "**T**est **B**ench"

Makes sense, thanks.

> > Oh are we that lucky? I will delete that class now then.
> 
> it's an optimisation based on the assumption that yosys will not be able to
> correctly produce optimal FPGA connections.
> 
> this will interfere with us doing an ASIC.

Woohoo! ;-)

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