[Libre-soc-bugs] [Bug 450] Create MMU from microwatt mmu.vhdl

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=450

--- Comment #25 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
 737 #           nonzero := or(r.addr(61 downto 31) and not finalmask(
 738 #                      30 downto 0));
 739             comb += mbits.eq(0 & r.mask_size)
 740             comb += v.shift.eq(r.shift + (31 -12) - mbits)
 741             comb += nonzero.eq('''TODO wrap in or (?)'''r.addr[31:62]
 742                                & (~finalmask[0:31]))


ok.

so.

or(somebits) in nmigen is somebits.bool()

however, this produces a 1 bit "thing" which, if &'ed with a multi-bit "thing"
will ONLY TEST THE FIRST BIT.

at line 742 you have taken 32 bits of finslmask and inverted them.

this produces a 32 bit inverted signal.

then, you expected that to be ANDed with a test of whether raddr[31:62] is
nonzero but this test is only 1 bit.

therefore the & will take ONLY THE FIRST BIT OF FINALMASK.

what you actually want is this:

(r.addr[31:62] & ~finalmask[0:31]).bool()

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