[Libre-soc-bugs] [Bug 199] Layout using coriolis2 main core, 180nm

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=199

--- Comment #53 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
jean-paul i'm running the doDesign.py and adding div0.  it says
"div0 has 12 badly placed pins" but doesn't say what they are.


Python stack trace:
#0 in                  __init__() at
.../install/lib/python2.7/dist-packages/crlcore/helpers/io.py:167
#1 in               placeIoPins() at
.../dist-packages/cumulus/plugins/alpha/block/block.py:411
#2 in                     build() at
.../dist-packages/cumulus/plugins/alpha/block/block.py:501
#3 in                     build() at
.../dist-packages/cumulus/plugins/alpha/block/block.py:496
#4 in                scriptMain() at
/home/lkcl/soclayout/experiments9/doDesign.py:666
#5 in                  <module>() at
.../coriolis-2.x/Linux.x86_64/Release.Shared/install/bin/cgt:201

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