[libre-riscv-dev] [Bug 272] functions needed in POWER simulator which match 3.0B spec

[bugzilla-daemon at libre-riscv.org]

http://bugs.libre-riscv.org/show_bug.cgi?id=272

--- Comment #9 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
(In reply to Michael Nolan from comment #7)
> (In reply to Luke Kenneth Casson Leighton from comment #3)
> > these are the functions, listed in 3.0B section 1.4.3 p6 - p7
> > 
> > BCD_TO_DPD(x)
> > DPD_TO_BCD(x)
> 
> The instructions that use these pseudocode functions (cbcdtd and cdtbcd)
> cause the qemu power9 machine to trap to an exception handler. Should I
> bother trying to implement them at the moment?

... naah :)

(In reply to Michael Nolan from comment #8)
> Status of each helper function in the document:
> SINGLE(x)	- Float - needs softfloat library

let's leave this one for now.  i'd like to focus on integer initially.

i am planning to do a "pre-prep" phase (which gets variables set up,
reading in advance from the regfile) and "post-cleanup" phase
(which writes out anything that was modified)

what we will need, however, is an indexable overloaded integer class.
(err, basically, the features of Signal).

in other words, due to the fact that you can do this:

RS[32:64] = product[0:32]

or

RS[0:32] = (RA)[0:32] + (RB)[0:32]

it means basically an integer class with operator overloads on
__add__ *and* it means adding a __getitem__ (in order to be able
to do the slice), and probably changing it to be this:

RS[0:32].eq(RA[0:32] + RB[0:32])

later, we will need a class for SimpleV anyway (so as to be able to change
bit-widths)

do you want to do that?  it's basically a class:

class Int:
   def __init__(self, value, width):
       self.value = value
       self.width = width
   def __getitem__(self, idx):
       if isinstance(idx, slice):
           # TODO, convert slice to an &able mask,
           # make sure that the length is that of the slice
       else:
           return Int((self.int & (1<<idx) >> idx, 1)

it will also need an "append" function - again, just like Signal can
use Cat().

it *might* - although performance will be absolutely terrible - be that
we are forced to individually slice bits into lists.

one other alternative, michael, is just... use Signal.  it's got everything
needed.

ideas?

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