[libre-riscv-dev] [Bug 186] Create decoder for SOC: Power ISA and RISC-V

[bugzilla-daemon at libre-riscv.org]

http://bugs.libre-riscv.org/show_bug.cgi?id=186

--- Comment #65 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
make sure to do form-lookup for:

* bperm
* cmpeqb
* darn
* dzbz
* extswsli
* mcrxrx
* modud
* moduw
* modsd
* modsw
* setb
* attn
* sim_cfg

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