[libre-riscv-dev] [Bug 377] possible bug in Simulator Mem ld/st function

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=377

--- Comment #4 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
i tracked this down by adding memory dump/alteration to qemu and making
a comparison of memory in qemu and memory in the simulator.

it was a number of separate things:

* the hardware was not performing big-endian byte reversal
* the simulator was storing 8 bytes in a dictionary on 8-byte
  address-aligned boundary where the data order of each 8-byte
  group was byte-reversed (big-endian)
* to correct this, the shift-mask function subtracted the offset
  from the *other* end (the 8-byte boundary of the underlying
  simulated memory - 64 bit blocks)

what i did was:

* reverse the order of 8-byte groups being stored to be in
  little-endian format in the simulator
* turned the shift round so that it is exactly the
  LSB bits of the address (bits 0 to 2) where previously
  it was (7-datalen-AddrLSBs)
* added a function which byte-reverses (big-endians) the load/store
  *data* - not the entire simulator-stored 64-bit-granularity memory
* added a byte-reverse function into the hardware.

that byte-reverse function *should* now be possible to call on-demand
for LD/ST byte-reversal opcodes.  i will give that a shot and see if
it works.

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