[libre-riscv-dev] [Bug 325] create POWER9 TRAP pipeline

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=325

--- Comment #38 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
i'm looking at the 3.0B pseudocode for OP_SC and going "hmmm".

SC-Form

* sc LEV

    SRR0 <-iea CIA + 4
    SRR1[33:36] <- 0
    SRR1[42:47] <- 0
    SRR1[0:32]  <- MSR[0:32] 
    SRR1[37:41] <- MSR[37:41]
    SRR1[48:63] <- MSR[48:63]
    MSR <- new_value 
    NIA <- 0x0000_0000_0000_0C00

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