[libre-riscv-dev] daily kan-ban update 29jul2020

Cole Poirier colepoirier at gmail.com
Wed Jul 29 21:37:01 BST 2020


* finished coriolis2 workflow scripts and documentation (now includes
  soclayout instructions)
* finished 180nm test ASIC memory layout diagram translation to SVG,
  the hand-drawn version has been replaced with this version on the
  180nm test ASIC wiki page
* got profoundly confused about XICS, LoPAR, PAPR... etc.
  (fortunately Luke figured a temporary solution with microwatt team)


* start a correspondence with Mitch about getting the original images
  from his book chapters (vector rather than bitmap), and consultation
  on if he would like to use the new SVGs in a future version of the
  book chapters
* documented my completed, current, near future work on my wiki page
* closed several bugs that had been resolved at various points in the
  past few months but hadn't been marked RESOLVED on bugzilla
* start the process of creating a bug report for each diagram that is
  to be converted to SVG
* brainstorming with other project members about recruiting more
  project members
* solicit input from project members on what should be asked about
  the BlackParrot RV664GC 14nm (!!!!) Multicore SoC in my email
  to that project's developers
* Libre-SOC OPF MKII Call

The call will start in just under an hour and a half from now, correct?


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