[libre-riscv-dev] how do we test external interrupts?

Luke Kenneth Casson Leighton lkcl at lkcl.net
Tue Jul 28 17:14:46 BST 2020

On Tue, Jul 28, 2020 at 3:55 PM Samuel Falvo II <sam.falvo at gmail.com> wrote:
> I might be stating the obvious; but, according to
> https://www.kernel.org/doc/html/latest/virt/kvm/devices/xive.html, it
> looks like XICS is a POWER7- / POWER8-related specification.
> Wikipedia indicates POWER7 was released around 2010-ish.  Maybe
> finding specs dated about that time would be a good place to look?  (I
> tried but wasn't successful.)

yeah i've reviewed v2.07B which was POWER8 and there's nothing in
that, either.  according to this:

the *actual* name is "Logical Partition" (LPAR) although where on
earth the relationship is with XICS, is completely unclear, and
reading the Chapter on LPAR Control (p927 v3.0B) gives nothing
obvious.  searching for keywords "CPPR", "MFFR" also give nothing.

if we are deploying reverse-engineering and pattern-matching, this
looks very similar to microwatt xics.vhdl:

at least the memory set/get looks familiar, where qemu xics.c looks
more like it is more qemu-internals / qemu-plumbing


More information about the libre-riscv-dev mailing list