[libre-riscv-dev] daily kan-ban update 06jul2020
Luke Kenneth Casson Leighton
lkcl at lkcl.net
Tue Jul 7 11:08:58 BST 2020
On Tue, Jul 7, 2020 at 7:05 AM Jacob Lifshay <programmerjake at gmail.com> wrote:
> didn't get a lot done due to distraction since my housemates' family are
> thinking out in more detail what's needed for a do-while loop in a
the bit that "breaks" is when the ready-valid signalling goes into
"roundabout" mode (feedback). this is not a combinatorial loop that is
active _all_ the time: it's only active under certain conditions.
this and the fact that it broke when trying to add mask-cancellation
is why i stopped investigating loopback pipelines until there was more
time to do so.
so yes, please do _think_ about it but please for goodness sake do not
spend time actually implementing anything on it until after the Oct
> should also be useful for implementing a FSM by putting the FSM's
> combinatorial logic in the loop.
the hybrid FSM-pipeline API i developed made it unnecessary to
consider. each stage was given a "state" (name), and an additional
suite of "management instances" deriving from a FSM base class
(similar to ControlBase) contained the "state machine decision logic".
so in a similar fashion to the pipeline API, how the combinatorial
logic is separated into "Stages", and the I/O is separated out as
well, these combinatorial "Stages" can *also* be used by FSMs simply
by using the alternative building-blocks.
it worked. it actually worked.
however... i quickly found that the separation of the "FSM
decision-making logic" from the "FSM combinatorial computation logic"
made it extremely difficult to understand what was actually going on.
and when trying to use the same combinatorial blocks for both FSMs and
pipelines, the effort of thinking about how to keep both of them
simple and obvious was just too great a burden on the API.
> planning on building a FSM-based div pipeline tomorrow -- should be nearly
> trivial to do since I can just take the existing div pipeline and replace
> the div pipe core with a udiv/rem FSM
superb. you saw, i asked Cesar if he could write a (simple) FSM example?
can you please keep to a really *really* simple design principle. do
not overthink this. i have been down that road already and it is
virtually impossible for anyone else to read and understand the
so please: keep it *real* simple, ok? you can see from microwatt's
div engine, it's 100 lines of code.
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