[libre-riscv-dev] 130nm for the hackers : finally a reality ?

Luke Kenneth Casson Leighton lkcl at lkcl.net
Thu Jul 2 15:25:41 BST 2020

found one:


see TestModule.

basically, what both you - and i - want to do is to stick to nmigen
and to define peripherals and the full chip interconnect in nmigen,
where i would like (in addition to that) the IO and peripherals to be
specifiable in some machine-readable text form.

unfortunately, litex does a lot more than just the HDL.


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