[libre-riscv-dev] Following the PowerISA

[Immanuel, Yehowshua U]

On the website, we have:

> The Libre RISC-V Project is building a hybrid CPU/GPU SoC. As the name of the project implies, 
> we will be following the RISC-V ISA due to it being open-source and also because of the huge 
> software and hardware ecosystem building around it. 

Since we are now doing userspace RISCV+POWER and system-wide POWER, I imagine this section should be updated?