[libre-riscv-dev] [Bug 108] IEEE754 FPU FCVT "upconversion" needed

[Luke Kenneth Casson Leighton]

this one was quite straightforward: aside from one normalisation which
only activates on near-zero numbers (exponent at absolute limit just
before zero).

declared as "done" as well.  next is the INT-to-FP and FP-to-INT

l.

On Tue, Jul 16, 2019 at 7:28 AM <bugzilla-daemon at libre-riscv.org> wrote:
>
> http://bugs.libre-riscv.org/show_bug.cgi?id=108
>
> Luke Kenneth Casson Leighton <lkcl at lkcl.net> changed:
>
>            What    |Removed                     |Added
> ----------------------------------------------------------------------------
>          Resolution|---                         |FIXED
>              Status|CONFIRMED                   |RESOLVED
>
> --- Comment #1 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
> https://git.libre-riscv.org/?p=ieee754fpu.git;a=commitdiff;h=1b91f4639aee04ecabd24126675a752f53523298
>
> unit tests functional.
>
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