[libre-riscv-dev] OpenPiton parallelism and some links

[Luke Kenneth Casson Leighton]

On Wed, Feb 6, 2019 at 7:01 AM <oajhfappp at firemail.cc> wrote:
>
> First of all, thanks for everyone working on this project.
> I don't know the technical details, but I really appreciate the efforts.

 thanks.

> The Princeton University has a project called OpenPiton[1]. It's a
> open source manycore processor. Originally based on OpenSPARC, but
> some people ported some parts to work with RISC-V (see Ariane[2] and
> JuxtaPiton[3]).
> Other projects from PULP also explores parallelism, such as bigPULP[4].
>
> I thought maybe Simple-V could explore the parallel mechanism from these
> projects?

 i took a look: we really need standard multi-core SMP, as the GPU is
not just a GPU, it's a CPU that happens to have been targetted at
hybrid software-hardware GPU *and* VPU tasks as well.

 surprisingly there aren't very many libre SMP libraries out there:
most of the stuff that i've been able to find is research material,
students creating

> Or the caching mechanism?

 i found one very interesting paper on caches, it referenced something
called "Dragon":
  https://en.wikipedia.org/wiki/Dragon_protocol

 however what was particularly interesting about this research paper
is that it flipped *between* two of the best cache-coherence
protocols, depending on the workload, i.e. how many write-clashes
there were.  if the number of clashes dropped below a certain
threshold it automatically switched to a better, more efficient
algorithm best suited for use when programs are more independent of
each other.

 it was a really smart strategy.


> Also, there's some exciting work being done on HDL (Clash[5] and BSV[6])
> and on
> open sourcing FPGA's workflow (see Symbiflow[7], Nextpnr[8], and
> nMigen[9] for
> software and TinyFPGA[10], Radiona ULX3S[11] and Fomu[12] for hardware).
>
> Hope some of these can be useful.

 very much so, will take a look.  we're going to be using nmigen, and
we looked at nextpnr because there's a rather large FPGA (75k LUTs)
that it now supports: the Lattice ECP5.

 thanks!

>
>
> [1] http://parallel.princeton.edu/openpiton
> [2]
> https://github.com/pulp-platform/ariane#preliminary-support-for-openpiton-cache-system
> [3] https://arxiv.org/abs/1811.08091
> [4] https://github.com/pulp-platform/bigpulp
> [5] https://clash-lang.org/
> [6] https://github.com/rsnikhil/Bluespec_BSV_Formal_Semantics
> [7] https://symbiflow.github.io/
> [8] https://github.com/YosysHQ/nextpnr
> [9] https://github.com/m-labs/nmigen
> [10] https://tinyfpga.com
> [11] https://github.com/emard/ulx3s
> [12] https://www.crowdsupply.com/sutajio-kosagi/fomu
>
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