[libre-riscv-dev] 1R1W regfiles

Luke Kenneth Casson Leighton lkcl at lkcl.net
Fri Dec 21 13:08:52 GMT 2018

On Fri, Dec 21, 2018 at 10:38 AM Jacob Lifshay <programmerjake at gmail.com> wrote:

> On Fri, Dec 21, 2018 at 1:46 AM Luke Kenneth Casson Leighton <lkcl at lkcl.net>
> wrote:
> > * byte-level crossbars (4x4) are subsumed into xBitManip ALUs
> > (xBitManip can do full 4-to-4 byte routing)
> >
> Note that apparently work on the official B extension has started up again

  apart from not providing any releases of any information, so that
absolutely nobody outside of the RISC-V closed doors gets to find out
what's going on, that's good news.


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