[libre-riscv-dev] evaluation of bit-witdh scoreboards
luke.leighton at gmail.com
Sat Dec 15 11:51:06 GMT 2018
commentary on comp.arch: the size of the matrices needed are *massive*.
* each LD/ST will need its own FU, that's 8.
* each branch (per speculation) likewise
* if we want 4-issue we need an absolute minimum of 4 FUs
that's *per bit-width*.
regarding VSHUFFLE: it can be done by parallelising a MV.X and
FMV.X... except no such scalar operation exists: we will have to add
i really don't like to add instructions, we do however have to add
them anyway. it would however be way, WAY simpler than the remap
system and would allow sequential instruction-issue
also, we need to evaluate whether to drastically cut down the number
of registers and use a 2k SRAM instead.
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