[libre-riscv-dev] GPU design

lkcl lkcl at libre-riscv.org
Thu Dec 6 15:03:24 GMT 2018

On Thu, Dec 6, 2018 at 2:05 PM Jacob Lifshay <programmerjake at gmail.com> wrote:
> the Alpha 21164 has a scoreboard and two load units (integer pipe 0 & 1),
> also, the d-cache has two read ports, so I would expect that it can execute
> multiple loads simultaneously.
> http://www.eecg.toronto.edu/~moshovos/ACA07/lecturenotes/21164%2520(micro).pdf


examples always appear to be the 6600 (first time SB appeared),
definitely 2+ LOADs stall in that design.  ARM Cortex A8 apparently is
dual-issue superscalar, however it seems to be a hybrid where the
compiler is expected to allocate instructions based on an alternating
cycle to "help" avoid conflicts.


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