[libre-riscv-dev] GPU design

Jacob Lifshay programmerjake at gmail.com
Wed Dec 5 09:23:37 GMT 2018

having a scoreboard doesn't mean you have to have imprecise exceptions, you
could have a scoreboard + reorder buffer, or you could have the scoreboard
not execute instructions until all prior instructions are known to not trap.

If we ended up with imprecise exceptions, I'd be very tempted to just build
a barrel processor instead.

On Tue, Dec 4, 2018, 21:37 lkcl <lkcl at libre-riscv.org wrote:

> http://home.deib.polimi.it/silvano/FilePDF/AAC/Lesson_4_ILP_PartII_Scoreboard.pdf
> slide 16.  i *really* do not like the idea of "imprecise exceptions".
> some instructions will have been permitted to execute out-of-order
> (with no roll-back / recovery mechanism), yet they caused "damage",
> and, reailistically, the full state has to be context-switched (the
> entire scoreboard).
> by contrast, the reorder buffer of tomasulo, the buffer is what
> preserves the order, and only the head of the buffer may be
> "committed" (an exception, a ST or a reg write).  yes, even exceptions
> may be put into the buffer (in speculative designs), only committing
> when they reach the head of the queue.
> the reorder buffer is basically near-identical to the whole
> software-based concept of database transactions.  it's actually best
> named "order buffer" or "in-order preserving buffer" as it *preserves*
> the order rather than actually does "reordering".
> l.
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