[Libre-soc-isa] [Bug 1243] when loading index registers, have defined behavior for out of range indexes

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=1243

--- Comment #4 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
(In reply to Jacob Lifshay from comment #1)
> an alternative idea is to have out-of-range indexes become -1,

whatever it is it has to be extreme-gate-efficient.

this is absolute paramount absolute top priority.

the indices are right smack in between decode and hazard matrix
filling, and *any* extraneous logic severely damages top speed.

comparators against VL are absolutely out.
comparators against -1 are likewise not a good idea.
a sub-2nm CPU will have at least a 4 gate cascade.

this is why it is UNDEFINED behaviour.

please drop this extraneous change and keep to the topic at hand
for the third time of requesting in under 24 hours.

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