[Libre-soc-isa] [Bug 1048] OPF ISA External RFC ls011 - Fixed and Floating point LD/ST-with-update EXT2xx instructions

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=1048

Luke Kenneth Casson Leighton <lkcl at lkcl.net> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
                 CC|                            |Nicholas_Calderwood at hotmail
                   |                            |.com,
                   |                            |shriya.sharma at redsemiconduc
                   |                            |tor.com

--- Comment #3 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
(In reply to Luke Kenneth Casson Leighton from comment #2)
> https://git.libre-soc.org/?p=libreriscv.git;a=commitdiff;
> h=f5bf4e5891a5669311d24ebbd5ef70fb8e7791ee
> 
> started adding english language words

shriya, nicholas, regarding this task: take a look at the above
diff.

+```
     EA <- (RA)
     RT <- ([0] * (XLEN-8)) || MEM(EA, 1)
     RA <- (RA) + EXTS(D)
+```
+
+Let the effective address (EA) be (RA|0).
+The byte in storage addressed by EA is loaded into
+RT[56:63]. RT[0:55] are set to 0.
+
+The sum (RA|0)+D is placed into register RA.
+
+If RA=0 or RA=RT, the instruction form is invalid.

now compare it to the words added by shriya a couple days ago:

https://git.libre-soc.org/?p=openpower-isa.git;a=blobdiff;f=openpower/isa/fixedload.mdwn;h=e66c461f


     EA <- (RA) + EXTS(D)
     RT <- ([0] * (XLEN-8)) || MEM(EA, 1)
     RA <- EA

+Description:Let the effective address (EA) be the sum (RA)+ D. The
+byte in storage addressed by EA is loaded into RT 56:63.
+RT0:55 are set to 0.
+EA is placed into register RA.
+If RA=0 or RA=RT, the instruction form is invalid.
+
 Special Registers Altered  



(you missed out the line-breaks though, shriya - those are important.
 and also the brackets RT[0:55])

but other than that: can you see how first RA is updated **AFTER**
in one instruction (and used as the address **BEFORE** being modified)
but in the other (the one in Power ISA 3.0) it does the address
calculation (EA) *and then uses it*?

this is the task: to write the *english language* description of what
the pseudocode says.  but first we need the actual english language
itself put into the shriya_add_description branch.

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