[Libre-soc-isa] [Bug 1090] feedback on OPF SVP64 RFC for "bigint" instructions: ls003.bignum

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=1090

shriya.sharma at redsemiconductor.com changed:

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                 CC|                            |shriya.sharma at redsemiconduc
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--- Comment #2 from shriya.sharma at redsemiconductor.com ---
ARM register offset load/store word and unsigned byte instructions.

https://developer.arm.com/documentation/ddi0406/c/Application-Level-Architecture/Instruction-Details/Shifts-applied-to-a-register/Constant-shifts

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