[Libre-soc-isa] [Bug 1214] Simple-V ISA Expansion -- Evaluate adding Simple-V to x86

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=1214

Jacob Lifshay <programmerjake at gmail.com> changed:

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--- Comment #1 from Jacob Lifshay <programmerjake at gmail.com> ---
(In reply to Luke Kenneth Casson Leighton from bug #1211 comment #5)
> (In reply to Jacob Lifshay from bug #1211 comment #4)
> > (In reply to Luke Kenneth Casson Leighton from bug #1211 comment #0)
> > > Top-level milestone for SVP64 ISA Expansion, starting with RISC-V and
> > > analysing ARM7 and Intel 486 for future work
> > 
> > I think we should focus on x86-64 since x86-32 is nearly dead at this
> > point...iirc i486 support isn't even in linux anymore
> 
> don't care.

Well, I care, and NLNet probably cares, since we don't want to do work on
something that basically no one will use, since the ISA is too old.

We could use Intel XED:
https://github.com/intelxed/xed
it's an open source (Apache 2.0) x86/x86-64 instruction decoder/encoder...that
looks like it should be somewhat doable to add some of SV to, and then
implement a minimal simulator on top of that that runs just enough for a strcpy
or something of similar complexity, that would probably be a few dozen
instructions at most. this is enough for a proof-of-concept on top of an ISA
(x86-64) that everyone does use. also, Intel XED has support for APX which
supports 32 GPRs.

> implementation exists. https://opencores.org/projects/ao486
> *assessment* not full-blown implementation.

according to the readme it implements cpuid and all 486SX instructions, so
basically everything but x87. so it is pretty full-blown, just not very useful
for our purposes imo since basically no one will want to target a i486, it
doesn't even have popcount or 64-bit atomics!

if we still didn't care if anyone will use it, why not try to add SimpleV to
the VAX ISA, it has a gcc target and an attempted linux port?

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