[Libre-soc-isa] [Bug 1056] questions and feedback (v2) on OPF RFC ls010

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=1056

--- Comment #32 from Paul Mackerras <paulus at ozlabs.org> ---
(In reply to Jacob Lifshay from comment #31)
> (In reply to Paul Mackerras from comment #30)
> > (In reply to Luke Kenneth Casson Leighton from comment #28)
> > > checking (2) memory-to-register:
> > > 
> > > what about the same conditions (MAXVL=VL=1, a half-word load)
> > > with lhbrx vs lhx?
> > > 
> > > * sv.lhbrx vs lhbrx, BE: same value loaded?
> > > * sv.lhbrx vs lhbrx, LE: same value loaded?
> > 
> > What are you assuming the element size is?
> 
> i'd assume elwid=16
> 
> > I am not clear at this point on how the element size affects loads and
> > stores. Does an element size of 16 bits mean that a load does 1/4 of the
> > usual number of bits, for instance?
> 
> no, memory access sizes are not modified by elwid, so sv.lhz/elwid=16 still
> loads 16-bits.

OK, thanks for clarifying that.

I think my example (of loading an array of four halfwords) then becomes
sv.lhz/elwidth=16 with VL=4. Hopefully that gets optimized to a single 64-bit
cache read.

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