[Libre-soc-isa] [Bug 1087] change pseudocode to prevent output register write only when causing a fp trap and output is in same regfile as input

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=1087

--- Comment #23 from Jacob Lifshay <programmerjake at gmail.com> ---
(In reply to Luke Kenneth Casson Leighton from comment #22)
> (In reply to Jacob Lifshay from comment #20)
> 
> jacob: i think you keep misunderstanding: RT *is* always written by
> the simulator.

i understand that perfectly fine, my proposal has nothing to do with how the
simulator works, it is to make the pseudocode always write to RT so hw doesn't
have to mask off writes to CR0 (causes problems for ddff) or read RT from the
regfile to compute CR0.

> comments in the unit test such as this are therefore misleading
> or at least ambiguous:
> 
> +                # FIXME: #1087 proposes to change pseudocode of fcvt* to
> +                # always write output, this implements reading RT when
> output
> +                # isn't written, which is terrible

this is terrible for hw, it means it neads to read another register just for
the very rare case when it traps so it can properly calculate CR0 from the RT
value it read.
> 
> it's not terrible at all for the *Simulator*, it doesn't care.

yup.

> also, i have to say, i don't fully understand what you mean
> "reading RT when output isn't written" - are you saying that
> the instruction has to become a READ-MODIFY-WRITE?

technically it'd be read-or-write in hardware

>  or that
> in *hardware* it is necessary to read RT, perform some
> checks, and then decide "actually RT need not be written"?
> this makes no sense: there really should only be MODIFY-WRITE
> (no read)

read needed to calculate CR0 when trapping, since then RT is not written

since we all agree that's terrible, I want to change the pseudocode to always
write RT even if it traps, that way it'd never need to read RT or mask off
writes (ignoring SVP64 predicates). since you had said to not make that change
(before you understood what I was talking about) i'm trying to get confirmation
that making fcvttg's pseudocode always write RT is fine with you.

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