[Libre-soc-isa] [Bug 1047] SVP64 LD/ST Data-Dependent Fail-First providing linked-list walking

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=1047

--- Comment #8 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
wrong:

 448         elif 'st' in insn_name and 'x' in insn_name:  # stwux
 449             res['Etype'] = 'EXTRA3'  # RM EXTRA2 type
 450             # RS: Rdest2_EXTRA2, RA: Rsrc1_EXTRA2 / Rdest
 451             res['0'] = "%s;s:RA;d:RA" % (sRS)
 452             res['1'] = 's:RB'  # RB: Rsrc2_EXTRA2

https://git.libre-soc.org/?p=openpower-isa.git;a=blob;f=src/openpower/sv/sv_analysis.py;hb=HEAD#l447

that is a bug, it actually *should* be EXTRA3 but where 2 of the bits
for RB and RS are taken from RM[6:7]

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