[Libre-soc-isa] [Bug 1077] evaluate removing /vec234 from instructions, move subvl to SVSTATE

bugzilla-daemon at libre-soc.org bugzilla-daemon at libre-soc.org
Wed May 3 13:47:12 BST 2023


--- Comment #17 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
(In reply to Jacob Lifshay from comment #4)

> as an example, take this not-unusual blur shader from supertuxkart:
> https://github.com/supertuxkart/stk-code/blob/
> fd12829e5b0c2f91fe522df5d8c74e3bb905b0cc/data/shaders/gaussian6h.frag
> it would need like 15 setvl ops, and that's without even unrolling that
> loop! something like >30 for the loop-unrolled version! If we instead keep
> the status-quo with support for subvl in the prefix, the entire function
> needs just one setvl op.

yowser. that's bad.  ok so it does make sense.

(In reply to Jacob Lifshay from comment #3)

> that applies equally to operations that write two registers such as dshl or
> all the FFT ops.

yes very true - those with an implicit RS=RT+MAXVL (elwidth overrides

overall then i think we just have to suck it up and go with /vec2-4 on
a per-instruction basis.  SVSTATE.hphint helps reduce some of the
Hazards (by declaring how many elements have no hazards).

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