[Libre-soc-isa] [Bug 1077] evaluate removing /vec234 from instructions, move subvl to SVSTATE
bugzilla-daemon at libre-soc.org
bugzilla-daemon at libre-soc.org
Wed May 3 12:03:23 BST 2023
https://bugs.libre-soc.org/show_bug.cgi?id=1077
--- Comment #14 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
(In reply to Dmitry Selyutin from comment #13)
> Guys, even if we close this task with EWONTFIX, I still feel obliged to ask:
> do we have other options to simplify register remapping process and make it
> more consistent? This is one of the most gory places in the whole asm/disasm
> process, so I need to raise this question. :-)
yes there's something called SVP64Single which *after* things stabilise
with SVP64(Vector) we can start looking at it. this page is a stub so
as to not forget that it exists
https://libre-soc.org/openpower/sv/svp64-single/
basically there are no reg-numbering holes in SVP64Single but there
is no looping as a result.
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