[Libre-soc-isa] [Bug 1071] add parallel prefix sum remap mode
bugzilla-daemon at libre-soc.org
bugzilla-daemon at libre-soc.org
Mon May 1 09:25:46 BST 2023
https://bugs.libre-soc.org/show_bug.cgi?id=1071
--- Comment #19 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
(In reply to Luke Kenneth Casson Leighton from comment #15)
> (In reply to Jacob Lifshay from comment #14)
> > for i in range(0, length, chunk_size):
> > sum += reduce_chunk(VL=chunk_size)
> > sum += reduce_tail(VL=length % chunk_size) # dynamic VL here
>
> drat, you're right.
>
> of course. okaaay sigh so this involves creating a new Form, with Parallel
> Reduction similar to svshape2 "carving out" its own niche... urrr...
ah. realised there's a complication. VL and MAXVL determines the number
of operations carried out, not the width of the reduction.
for now the tail will have to be done by recursive macros using
immediates manually.
--
You are receiving this mail because:
You are on the CC list for the bug.
More information about the Libre-SOC-ISA
mailing list