[Libre-soc-isa] [Bug 1015] rfc for rest of int/fp move/convert ls006

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=1015

--- Comment #22 from Jacob Lifshay <programmerjake at gmail.com> ---
(In reply to Jacob Lifshay from comment #17)
> (In reply to Luke Kenneth Casson Leighton from comment #16)
> > ok so i forgot to say that reducing the number of instructions
> > by merging FP32 and FP64 would be a step too far, because what
> > IBM typically does is allocate separate MAJOR opcodes for each.
> > so the "s" and non-"s" variants have to be separated out.
> > 
> > annoyingly.
> 
> i'd be happy to apply that change since it makes it closer to PowerISA's
> naming scheme.
> basically RCS gets deleted and replaced with separate `s` instructions and
> `.` instructions with a Rc field.

Done.

https://git.libre-soc.org/?p=libreriscv.git;a=history;f=openpower/sv/rfc/ls006.mdwn;hb=f13824387524bd68ce68c92562b3dc9d951f598f

commit f13824387524bd68ce68c92562b3dc9d951f598f
Author: Jacob Lifshay <programmerjake at gmail.com>
Date:   Wed Mar 22 18:45:30 2023 -0700

    remove RCS table since it's now unused

commit 29612ee9d2bd4d5977dbf68bc46ddd943aab7d20
Author: Jacob Lifshay <programmerjake at gmail.com>
Date:   Wed Mar 22 18:45:11 2023 -0700

    fix mnemonics

commit 928a7c90f0c8a6ac938dad6477b9df6b3978c874
Author: Jacob Lifshay <programmerjake at gmail.com>
Date:   Wed Mar 22 18:38:02 2023 -0700

    move form tables to between mnemonic list and pseudo-code, like the spec
does

commit a688ccce3ac502734a7ae8e18e28c7c54081db50
Author: Jacob Lifshay <programmerjake at gmail.com>
Date:   Wed Mar 22 18:36:12 2023 -0700

    remove wrong mnemonics

commit fc917fdaf848e3f15aece529be41228b75add4b1
Author: Jacob Lifshay <programmerjake at gmail.com>
Date:   Wed Mar 22 18:28:34 2023 -0700

    convert mnemonics to be code blocks, so markdown doesn't put all inst
variants on one line

commit 5561c3855255d17dc6d59cd036429143e352ee81
Author: Jacob Lifshay <programmerjake at gmail.com>
Date:   Wed Mar 22 18:22:27 2023 -0700

    change instruction section titles to match instruction mnemonics

commit 46c263f1dd0ec5c5d513cae0d428341f2234abc7
Author: Jacob Lifshay <programmerjake at gmail.com>
Date:   Wed Mar 22 18:15:00 2023 -0700

    convert fcvttg[o] to fcvt[s]tg[o][.]

commit 31f8085bae2028288a217990e2e8e337bd012a42
Author: Jacob Lifshay <programmerjake at gmail.com>
Date:   Wed Mar 22 17:57:00 2023 -0700

    convert fcvtfg to fcvtfg[s][.]

commit 1f310803d27b2ddd3f7be4bf7ed6a6d99f5d0f04
Author: Jacob Lifshay <programmerjake at gmail.com>
Date:   Wed Mar 22 17:44:57 2023 -0700

    dedent code section we're keeping in fcvtfgs[.] -- nothing but dedenting

commit f7f30c5ea1b46dc499ce80f0b3ca29fe8702acd1
Author: Jacob Lifshay <programmerjake at gmail.com>
Date:   Wed Mar 22 17:36:34 2023 -0700

    duplicate fcvt[f/t]g[o] sections in preperation for splitting out Single
versions

commit bc4900835fe18ad8ab37bcff74207918c3b6780e
Author: Jacob Lifshay <programmerjake at gmail.com>
Date:   Wed Mar 22 17:31:27 2023 -0700

    convert fmv[f/t]g to fmv[f/t]g[s][.]

commit ddecc774f9bc4e9b179822901843edbbefed4986
Author: Jacob Lifshay <programmerjake at gmail.com>
Date:   Wed Mar 22 17:19:12 2023 -0700

    duplicate fmv[f/t]g sections in preperation for splitting out Single
versions

commit bf12775cd69451fb6705e6dfb13a0f957e1e8b6c
Author: Jacob Lifshay <programmerjake at gmail.com>
Date:   Wed Mar 22 17:15:50 2023 -0700

    fix: fmvtg. changes CR0, not CR1

-- 
You are receiving this mail because:
You are on the CC list for the bug.