[Libre-soc-isa] [Bug 1017] ISA WG RFC for binary and ternary bitops

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=1017

--- Comment #12 from Jacob Lifshay <programmerjake at gmail.com> ---
it just occurred to me that all the binlog ops don't have many uses cases (only
one I could think of is simulating a fpga which is a very niche use case),
therefore should not be submitted in the same RFC as the ternlogi ops to avoid
ternlogi getting rejected.

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