[Libre-soc-isa] [Bug 1015] rfc for rest of int/fp move/convert ls006

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=1015

--- Comment #47 from Jacob Lifshay <programmerjake at gmail.com> ---
(In reply to Jacob Lifshay from comment #46)
> (In reply to Jacob Lifshay from comment #44)
> > since I think we need to rename fcvt*/fmv* to be consistent with existing
> > instructions, I propose:
> > 
> > fmvfg -> mtfpr/mtfprd (depending if we want a new instruction anyway)
> > fmvfgs -> mtfprs
> > fmvtg[.] -> mffpr[.]/mffprd (depending if we want a new instruction anyway)
> > fmvtgs[.] -> mffprs[.]
> > fcvtfg[.] -> ctfprd[.]
> > fcvtfgs[.] -> ctfprs[.]
> > fcvttg[o][.] -> cffprd[o][.]
> 
> luke responded that the renaming is fine, but we can't just reuse the
> existing vsx instructions (mffprd/mtfprd)
> 
> https://libre-soc.org/irclog/%23libre-soc.2023-06-22.log.html#t2023-06-22T09:
> 55:56

Did the rename, though used ctfpr/cffpr instead of ctfprd/cffprd to be
consistent with m[ft]fpr and with other FP operations that use s/<nothing>
instead of s/d.

https://git.libre-soc.org/?p=libreriscv.git;a=shortlog;h=be089eab5a23d6f2ae4891f60a8284b24ca34648

commit be089eab5a23d6f2ae4891f60a8284b24ca34648
Author: Jacob Lifshay <programmerjake at gmail.com>
Date:   Thu Jun 22 20:20:16 2023 -0700

    change instruction titles to match new names

commit 1d2438c5102227f6b53b760ba77eac3d740506af
Author: Jacob Lifshay <programmerjake at gmail.com>
Date:   Thu Jun 22 20:08:48 2023 -0700

    rename fmv[ft]g*/fcvt[ft]g* to m[tf]fpr*/c[tf]fpr*

https://git.libre-soc.org/?p=openpower-isa.git;a=shortlog;h=47c56299f95329c52298d6109552a1f886b30dd1

commit 47c56299f95329c52298d6109552a1f886b30dd1
Author: Jacob Lifshay <programmerjake at gmail.com>
Date:   Thu Jun 22 20:10:45 2023 -0700

    rename fmv[ft]g*/fcvt[ft]g* to m[tf]fpr*/c[tf]fpr*

commit de103f942c8fe5f284e41125f17759e242762924
Author: Jacob Lifshay <programmerjake at gmail.com>
Date:   Thu Jun 22 19:58:04 2023 -0700

    use the CSV "CR out" column to compute which mode to use for Rc=1

    this works much better than trying to bodge it by checking if the
    instruction name meets some pattern

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