[Libre-soc-isa] [Bug 1056] questions and feedback (v2) on OPF RFC ls010

bugzilla-daemon at libre-soc.org bugzilla-daemon at libre-soc.org
Tue Jun 6 23:20:02 BST 2023


--- Comment #67 from Paul Mackerras <paulus at ozlabs.org> ---
(In reply to Luke Kenneth Casson Leighton from comment #65)
> (In reply to Paul Mackerras from comment #62)
> > (I think you need to change 'if "addi" then' in the RTL to 'if "addi" or
> > "sv.addi" then'.)
> the logical implication then unfortunately being that even non-Vectorized
> instructions need "if addeo or sv.addeo" which will get very tedious
> and again give the impression there exists a difference between the
> two.

No, the adde RTL (addeo is in the adde/adde./addeo/addeo. group) should be fine
as it is. There is no "if" in its RTL currently. The reason that addi has the
"if" is to distinguish between addi and paddi. In the addi case, if you don't
want to mention sv.addi you could restructure the RTL as:

  if "paddi" then
    if R=0 then
    RT <- (RA|0) + EXTS64(SI)

It should be only those instructions where there is an existing prefixed
variant that would need to mention sv.xxx in the RTL (or where sv.xxx is
actually different from xxx, of course).

> the only one(s) actually different RTL are LD/ST-postinc and
> Branch-Conditional, and even there bc is a subset of sv.bc,
> with certain (new) immediate-operands set to defaults that
> are back-compatible to give bc

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