[Libre-soc-isa] [Bug 1183] add /mrr mode (reverse mode) to Data-Dependent Fail-First CR_ops and "single looping" to DDFFirst in general

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=1183

--- Comment #18 from shriya.sharma at redsemiconductor.com ---
(In reply to Jacob Lifshay from comment #3)
> e.g.:
> sv.cmpi/ff=lt 0, 1, *10, 5
> is:
> i = 0
> while i < VL:
>     CR0 = cmpd(gpr[10 + i], 5)
>     if CR0.lt:
>         break
>     i += 1
> VL = i
> 
> note how only CR0 is ever written and yet the whole vector loop is run

This is in contrast to the one above as it takes the vector value for register
0 in place of the scalar 0. 
sv.cmpi/ff=lt *0, 1, *10, 5
is:
i = 0
while i < VL:
    CR[i] = cmpd(gpr[10 + i], 5)
    if CR[i].lt:
        break
    i += 1
VL = i

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