[Libre-soc-isa] [Bug 1071] add parallel prefix sum remap mode

bugzilla-daemon at libre-soc.org bugzilla-daemon at libre-soc.org
Thu Apr 27 06:34:09 BST 2023


Jacob Lifshay <programmerjake at gmail.com> changed:

           What    |Removed                     |Added
             Status|CONFIRMED                   |IN_PROGRESS

--- Comment #9 from Jacob Lifshay <programmerjake at gmail.com> ---
(In reply to Luke Kenneth Casson Leighton from comment #7)
> and you *should* just be able to add the 2nd half onto the end (line 43
> onwards) and do
>    "if SVSHAPE.skip in [0b00, 0b01]: return"

turns out that reduce and prefix-sum are different enough that merging their
loops will be pretty confusing, so I just stuck all the prefix-sum code in a
big if. If/when we really need to merge them, we can refactor it then. I think
the pseudo-code will also benefit from having prefix-sum completely separate
from reduction, since it makes the loops much easier to understand.

> and that should basically be it.  add a *real* simple 2nd "demo()" function,
> please *don't* go massively overboard, or make significant changes to this
> code ok?
While I was reading the existing code, I noticed you have:
if SVSHAPE.invxyz[1]: steps.reverse()
which makes the function much more complex and isn't actually useful (it flips
the reduction tree vertically, exchanging the root end with the leaves end), so
I think that should be removed and steps merged into the loop rather than being
a separate loop generating a list.

Therefore, rather than modifying the existing function, I copied the function
to iterate_indices2, removed steps reversing, and added prefix-sum to the copy.
since prefix-sum is in an if all by itself, it can be easily copied into the
existing code if we don't want to remove steps reversing.

I added demo_prefix_sum as requested.

I also added test_remap_reduce_yield.py to verify that the prefix-sum
functionality matches nmigen.prefix_sum

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