[Libre-soc-isa] [Bug 1057] split out all int/fp min/max ops into their own RFC ls013

bugzilla-daemon at libre-soc.org bugzilla-daemon at libre-soc.org
Wed Apr 26 05:38:34 BST 2023


https://bugs.libre-soc.org/show_bug.cgi?id=1057

--- Comment #31 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
 6.10.2 Vector Floating-Point Maximum/ Minimum Instructions  . . . 424

these are FP32 only

MnemonicInstruction NamePage 
xsmaxcdpVSX Scalar Maximum Type-C Double-Precision736 
xsmaxcqpVSX Scalar Maximum Type-C Quad-Precision738 
xsmaxdpVSX Scalar Maximum Double-Precision734 
xsmaxjdpVSX Scalar Maximum Type-J Double-Precision739 
xsmincdpVSX Scalar Minimum Type-C Double-Precision743 
xsmincqpVSX Scalar Minimum Type-C Quad-Precision745 
xsmindpVSX Scalar Minimum Double-Precision741 
xsminjdpVSX Scalar Minimum Type-J Double-Precision746 
Table 29.VSX Scalar BFP Maximum/Minimum Instructions

looks like they do but more because SIMD. and type J and C
whatever those are?

-- 
You are receiving this mail because:
You are on the CC list for the bug.


More information about the Libre-SOC-ISA mailing list