[Libre-soc-isa] [Bug 1057] split out all int/fp min/max ops into their own RFC ls013

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=1057

--- Comment #25 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
(In reply to Jacob Lifshay from comment #24)
> https://git.libre-soc.org/?p=openpower-isa.git;a=shortlog;
> h=e3b46c6ec7911d08b8b0c4cb3c286c3786dae2ef
> 
> commit e3b46c6ec7911d08b8b0c4cb3c286c3786dae2ef
> Author: Jacob Lifshay <programmerjake at gmail.com>
> Date:   Mon Apr 24 23:49:19 2023 -0700
> 
>     replace min/max[su][.] with minmax[.]

looks really good

> commit 56697594f5f676339780d113a0be5ecf947c09e5
> Author: Jacob Lifshay <programmerjake at gmail.com>
> Date:   Mon Apr 24 23:47:20 2023 -0700
> 
>     add unofficial and comment2 columns to minor_19.csv

hmmm be *really* careful. don't take any shortcuts: always
run the *entire* test suite if you make these kinds of
severely-low-level changes.
> commit 52434df9a3b7125137fe786821a598575c9f5edc
> Author: Jacob Lifshay <programmerjake at gmail.com>
> Date:   Mon Apr 24 23:40:35 2023 -0700
> 
>     fix minmax pseudo-code -- CR0 must not have lt/gt swapped

ah yeah i always get those wrong

@@ -180,7 +180,7 @@ class AVTestCase(TestAccumulatorBase):
         e.intregs[3] = min(e.intregs[1], e.intregs[2])
-        e.crregs[0] = 0x4
+        e.crregs[0] = 0x8  # r1 <u r2
         self.add_case(Program(lst, bige

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