[Libre-soc-isa] [Bug 1057] split out all int/fp min/max ops into their own RFC ls013

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=1057

--- Comment #4 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
(In reply to Jacob Lifshay from comment #3)
> filled out ls013:

excellent. sorry missed this

> I had to reorganize them somewhat...

looks good.

> > important justification, that using VSX may have
> > different meaning (SVP64/VSX) so it is *really*
> > crucial to have SVP64/SFFS ops.
> 
> added with a TODO(lkcl) so you can elaborate.

got it. looking for a place to put it.

observations:

can you keep instruction spec layout to exactly the order in
power isa spec?

    title, form, syntaxes, pseudocode, specials, english words, examples

is the typical order.  you have words before specials.


second observation: Rc=1 is missing from fmin/max which is important.
means moving to a different Form.

related: X-Form is *not* appropriate. okok it is sort-of because
these are same instructions but let's not confuse matters.  X is
O from 21 thru 30.

A-Form would be better:

 194 
 195 # 1.6.17 A-FORM
 196     |0     |6     |11      |16     |21      |26    |31 |
 197     | PO   |  FRT |   FRA  | FRB   |   FRC  |   XO |Rc |
 198     | PO   |  FRT |   FRA  | FRB   |  FMM / |   XO |Rc |

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