[Libre-soc-isa] [Bug 1061] change extsb/h/w definitions to scale input size with XLEN rather than convert from fixed sizes

bugzilla-daemon at libre-soc.org bugzilla-daemon at libre-soc.org
Tue Apr 18 15:41:05 BST 2023


Luke Kenneth Casson Leighton <lkcl at lkcl.net> changed:

           What    |Removed                     |Added
             Blocks|                            |952

--- Comment #5 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
(In reply to Jacob Lifshay from comment #3)
> (In reply to Jacob Lifshay from comment #2)
> > note 1-bit to 8-bit sign extension is particularly useful for generating
> > traditional simd masks (generally used in code not specifically designed for
> > SVP64) where elements are either -1 or 0

grevlut covers this (as 1 of 1000sof others)

> e.g. code to generate 32-bit traditional simd masks (possibly faster than
> shifting):
> sv.extsb/elwid=8/subvl=4 *r3, *r3 # sign extend lsb but of each byte


> sv.extsh/elwid=32 *r3, *r3 # sign extend least significant byte of each
> 32-bit word to full word

like it.

Referenced Bugs:

[Bug 952] NLnet 2022 OPF ISA WG Milestone 2022-08-051 (approved, MoU TBD)
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