[Libre-soc-isa] [Bug 817] Big Integer Math (sv.adde, sv.subfe, sv.madded, 128 by 64-bit -> 64-bit div/rem, maybe more...)

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=817

--- Comment #44 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
commit f7468f57cdabc5685feaf503f4a5f9b669a35de7 (HEAD -> master)
Author: Luke Kenneth Casson Leighton <lkcl at lkcl.net>
Date:   Thu Sep 29 14:57:26 2022 +0100

    add carry-roll-over-vector-mul-with-add (!) unit test
    test_caller_svp64_bigint.py
    https://bugs.libre-soc.org/show_bug.cgi?id=937

https://git.libre-soc.org/?p=openpower-isa.git;a=commitdiff;h=f7468f57cdabc5685feaf503f4a5f9b669a35de7

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