[Libre-soc-isa] [Bug 905] create Scalar reg access encoding (SVP64-Single)

bugzilla-daemon at libre-soc.org bugzilla-daemon at libre-soc.org
Sun Sep 11 06:40:33 BST 2022


https://bugs.libre-soc.org/show_bug.cgi?id=905

--- Comment #4 from Jacob Lifshay <programmerjake at gmail.com> ---
(In reply to Jacob Lifshay from comment #3)
> equivalent v3.1 code:
> table:
> .long label1
> .long label2
> .long label3
> ...
> code:
> paddi r3, r3, table at pcrel, 1
> ld r3, 0(r3)  # can't use pld R=1 since it ignores input registers
> mtctr r3
> bctr

actually can't use paddi like that since it has the same issue as pld R=1

fixed:
code:
paddi r4, 0, table at pcrel, 1
ldx r3, r3, r4  # can't use pld R=1 since it ignores input registers
mtctr r3
bctr

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