[Libre-soc-isa] [Bug 924] New: potential major opcode allocation for SVP64

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=924

            Bug ID: 924
           Summary: potential major opcode allocation for SVP64
           Product: Libre-SOC's first SoC
           Version: unspecified
          Hardware: Other
                OS: Linux
            Status: CONFIRMED
          Severity: enhancement
          Priority: ---
         Component: Specification
          Assignee: lkcl at lkcl.net
          Reporter: lkcl at lkcl.net
                CC: libre-soc-isa at lists.libre-soc.org
   NLnet milestone: ---

there are discussions and reasons that cannot be disclosed,
there is an ISA WG meeting coming up tuesday 12th,
a need has come up to find ways to allocate SVP64 and the
80+ scalar opcodes without using 75% of 3 major 32 bit opcodes.

* 75% (50%?) needed for SVP64, SVP64-Single (and SVP64-Reserved?)
* 75% for grevluti, crternlogi, ternlogi
* 75% for xpermi, bmrevi, grevlut etc

this would require for example EXT005 EXT009 and 75% of EXT017

an alternative is needed.

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