[Libre-soc-isa] [Bug 960] OPF ISA External RFC ls003 - maddedu and divmod2du

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=960

--- Comment #8 from Jacob Lifshay <programmerjake at gmail.com> ---
(In reply to Jacob Lifshay from comment #7)
> if ls003 isn't submitted yet, we should add maddedus (unsigned bigint *
> signed word).
> https://bugs.libre-soc.org/show_bug.cgi?id=817#c56
> and also potentially both muledsbu (signed bigint * unsigned word) and
> muledsbs (signed bigint * signed word) if it can be made to work with signed
> bigints -- i have an idea for that...more about that below:
> 
> i was thinking about what I said in
> https://bugs.libre-soc.org/show_bug.cgi?id=817#c57 and think I have a
> solution -- basically corrections could be applied to RC to account for the
> previous multiplication being signed when it shouldn't -- not just adding
> RC, hence not naming madd*.

i figured out the correct code for muledsbu:
muledsbu RT, RA, RB, RC
# correct for RC being high half of signed-unsigned mul
# when we need high half of unsigned mul
v[0:XLEN*2-1] <- [0] * XLEN || (RC)
if (RC)[0] != 0 then
    v[XLEN:XLEN*2-1] <- (RB) + (RC) # note only lower XLEN bits
<!-- no MULUS, so do it manually -->
prod[0:XLEN*2-1] <- [0] * (XLEN * 2)
if (RA)[0] != 0 then
    prod[0:XLEN*2-1] <- -(-(RA) * (RB))
else
    prod[0:XLEN*2-1] <- (RA) * (RB)
v <- v + prod
RT <- v[XLEN:XLEN*2-1]
RS <- v[0:XLEN-1]

i'll figure out muledsbs sunday or monday.

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