[Libre-soc-isa] [Bug 968] document shift-and-add instruction
bugzilla-daemon at libre-soc.org
bugzilla-daemon at libre-soc.org
Tue Nov 1 19:53:54 GMT 2022
https://bugs.libre-soc.org/show_bug.cgi?id=968
--- Comment #14 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
(In reply to Andrey Miroshnikov from comment #11)
> (In reply to Luke Kenneth Casson Leighton from comment #10)
> > 64-bit on both operands, it makes no difference whatsoever.
> Ah ok, although the operands are unsigned, the sign extension allows to do
> address offsetting.
>
> >
> > compare:
> >
> > ADD( RA, SIGNEXTEND( LOWERHALF(RB) )
> >
> > with:
> >
> > ADD( RA, ZEROEXTEND( LOWERHALF(RB) )
> >
> > then set RB=0x0000_0000_8000_0000 and compare the two.
>
> Thanks, that info was missing from bitmanip.mdwn.
yes. you don't put massive explanations into pseudocode.
it goes into notes (here) or a discussion page.
> Where are these statements located?
they are not. i wrote them for you, just now.
> > because it is more compact when doing address offsets. takes up less
> > space. RA base 64 bit, offsets into data structure need only be 32bit.
>
> Does that mean shadduw pseudocode is missing a EXTS() statement?
no it does not.
> There is no explicit sign-extension in the pseudocode.
correct. if the desired behaviour was to perform a signed 32bit add
then not only would EXTS be used, the instruction would be called "shaddsw"
(or sigh shaddws)
> Adjusted based on your explanation:
> https://git.libre-soc.org/?p=libreriscv.git;a=commitdiff;
> h=95a74ba3566333ac498bb1110781e563f86b4c06
read again. i said *no* on changing the pseudocode markdown for
ISACaller. why did you then change the pseudocode markdown used
by ISACaller?
please revert
@@ -122,17 +124,21 @@ shadd r4, r1, r2, 3
Pseudocode:
shift <- sm + 1 # Shift is between 1-4
- n <- (RB)[XLEN/2:XLEN-1] # Limit RB to upper word (32-bits)
+ n <- (RB)[32:63] # Only use lower 32-bits of RB
sum[0:63] <- (n << shift) + (RA) # Shift n, add RA
RT <- sum # Result stored in RT
--
You are receiving this mail because:
You are on the CC list for the bug.
More information about the Libre-SOC-ISA
mailing list