[Libre-soc-isa] [Bug 533] design new CR instructions suitable for predication

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=533

Luke Kenneth Casson Leighton <lkcl at lkcl.net> changed:

           What    |Removed                     |Added
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   budget (EUR) for|0                           |1000
         this task,|                            |
          excluding|                            |
   subtasks' budget|                            |
                URL|                            |https://libre-soc.org/openp
                   |                            |ower/sv/cr_int_predication
 total budget (EUR)|0                           |1000
  for completion of|                            |
       task and all|                            |
           subtasks|                            |

--- Comment #10 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
in order to match with the pmovmaskb concept i'm recommending that
sv.crweird and sv.crweirder be even less consistent with the usual
SV conformity/paradigm and allow the elwidth to specify that 1, 2, 4 or 8
bits of CR-based results be packed into INTs.  excluding zeroing of
upper bits, and using MSB0 numbering:

    for i in range(VL):
        result = some_function_of(CRfield[i])
        if RT.elwidth == 0b00:
            iregs[RT+i][63] = result # sets LSB to result
        if RT.elwidth == 0b01:
            iregs[RT+i//2][63-(i%2)] = result
        if RT.elwidth == 0b10:
            iregs[RT+i//4][63-(i%4)] = result
        if RT.elwidth == 0b11:
            iregs[RT+i//8][63-(i%8)] = result

in combination with sv.ori./ew=8,16,32 or grevlut it will be possible to
transfer (two-way) between integers and CRs

see grevlut https://libre-soc.org/openpower/sv/bitmanip/

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