[Libre-soc-isa] [Bug 894] New: Issues with TOC immediate loading being redundant with PowerISA v3.1 pld R=1 and being CISC
bugzilla-daemon at libre-soc.org
bugzilla-daemon at libre-soc.org
Wed Jul 27 04:18:49 BST 2022
https://bugs.libre-soc.org/show_bug.cgi?id=894
Bug ID: 894
Summary: Issues with TOC immediate loading being redundant with
PowerISA v3.1 pld R=1 and being CISC
Product: Libre-SOC's first SoC
Version: unspecified
Hardware: PC
URL: https://libre-soc.org/openpower/sv/toc_data_pointer/
OS: Linux
Status: CONFIRMED
Severity: normal
Priority: ---
Component: Specification
Assignee: lkcl at lkcl.net
Reporter: programmerjake at gmail.com
CC: libre-soc-isa at lists.libre-soc.org
Blocks: 286
NLnet milestone: ---
Reposting my complaint here, so it doesn't get forgotten:
https://git.libre-soc.org/?p=libreriscv.git;a=blob;f=openpower/sv/toc_data_pointer.mdwn;h=74b1c9d1f2162463593ce7e0b458474039ccc361;hb=HEAD
if you have:
cmpi r3, {TOC + 8}
imho that's basically the same as x86_64's CISC-style register-memory
instruction:
cmp rax, [rip+0x1234]
imho a better approach is to instead just use the pc-relative loads added as
part of v3.1 -- pld with R=1:
pld r4, 0x1234(0), 1 # r4 = load_64(pc + 0x1234)
cmp r3, r4
no TOC needed.
Referenced Bugs:
https://bugs.libre-soc.org/show_bug.cgi?id=286
[Bug 286] DataPointer concept: long-immediate references
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