[Libre-soc-isa] [Bug 697] SVP64 Reduce Modes
bugzilla-daemon at libre-soc.org
bugzilla-daemon at libre-soc.org
Wed Feb 2 01:03:30 GMT 2022
https://bugs.libre-soc.org/show_bug.cgi?id=697
--- Comment #4 from Jacob Lifshay <programmerjake at gmail.com> ---
(In reply to Luke Kenneth Casson Leighton from comment #3)
> there is already a "reverse gear" bit in SVP64
i don't think that does what we might need here...
reversed means it reduces like so (@ are adds;
this one is more efficient on arm):
0 1 2 3 4 5 6 7
| | | | | | | |
@----|----|----|----/ | | |
| @----|----|---------/ | | distance=4
| | @----|--------------/ |
| | | @-------------------/
| | | |
@----|----/ | distance=2
| @---------/
| |
@----/ distance=1
|
the original (current SimpleV) reduce goes distance=1,2,4...
0 1 2 3 4 5 6 7
| | | | | | | |
@----/ @----/ @----/ @----/ distance=1
| . | . | . |
@---------/ . @---------/ distance=2
| . . . |
@-------------------/ distance=4
|
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